Published on November 2014 | Low Power Electronics, Tunnel FET, Nanoelectronics

A Simulation-Based Proposed High-k Hetero Structure AlGaAs/Si Junction–Less N-Type Tunnel FET
Authors: S. B. Rahi, Bahniman and Pranav Asthana
Journal Name: Journal of Semiconductor
Volume: 35 Issue: 11 Page No: 1-5
Indexing: SCOPUS,Web of Science
Abstract:

We propose a heterostructure junctionless tunnel field effect transistor (HJL-TFET) using AlGaAs/Si. In the proposed HJL-TFET, low band gap silicon is used in the source side and higher band gap AlGaAs in the drain side. The whole AlGaAs/Si region is heavily doped n-type. The proposed HJL-TFET uses two isolated gates (named gate, gate1) with two different work functions (gate=4.2 eV, gate1=5.2 eV respectively). The 2-D nature of HJL-TFET current flow is studied. The proposed structure is simulated in Silvaco with different gate dielectric materials. This structure exhibits a high on current in the range of 1.4×10-6 A/μm, the off current remains as low as 9.1×10-14 A/μm. So ION/IOFF ratio of ≃ 108 is achieved. Point subthreshold swing has also been reduced to a value of ≃ 41 mV/decade for TiO2 gate material

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