Published on April 2021 | Low Power Electronics, VLSI, Tunnel FET

Low Power Circuit and System Design Hierarchy and Thermal Reliability
Authors: Guenifi Naima, Shiromani Balmukund Rahi
Journal Name: Silicon
Volume: 13 Issue: 4 Page No: 1-12
Indexing: SCOPUS,Google Scholar
Abstract:

Tunnel FET is one of the promising devices advocated as a replacement of conventional MOSFET to be used for low power applications. Temperature is an important factor affecting the performance of circuits or system, so temperature associated reliability issues of double gate Tunnel FET and its impact on essential circuit design components have been addressed here. The temperature reliability investigation is based on double gate Tunnel FET, containing Si1-xGe x / Si, source/channel and HfO2 high-k gate dielectric material. During investigation, it has been found that at high temperature application range ~ 300 K - to - 600 K, the Tunnel FET device design parameters exhibit weak temperature dependency with switching current (ION), while the off-state current (IOFF) is slightly varying ~10-17A/µm-to-10-10A/µm. In addition, the impact of temperature on various device design element such as VTH (i.e., switching voltage), on-current (ION), off-current (IOFF), switching ratio (ION/IOFF) and average subthreshold slope (i.e., SSavg), ambipolar current (IAMB) have been done in this research work. The essential circuit design components for digital and analog/RF applications, such as current amplification factor (gm) and its derivative (gm'), the C-V components of device design, Cgg Cgd and Cgs, cut - off frequency (ƒT) and gain band width (GBW) product have deeply investigated. In conclusion, the obtained results show that the designed double gate Tunnel FET device configuration and its circuit design components are suitable for ultra-low power circuit, system applications and reliable for hazardous temperature environment.

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