Published on November 2016 | Low Power Electronics, Tunnel FET, Nanoelectronics

Heterogate junctionless tunnel field-effect transistor: future of low-power devices
Authors: Shiromani Balmukund Rahi, Pranav Asthana & Shoubhik Gupta
Journal Name: Journal of Computational Electronics
Volume: 15 Issue: 4 Page No: 30-38
Indexing: SCI/SCIE,SCOPUS,Google Scholar
Abstract:

Gate dielectric materials play a key role in device development and study for various applications. We illustrate herein the impact of hetero (high-k/low-k) gate dielectric materials on the ON-current (ION) and OFF-current (IOFF) of the heterogate junctionless tunnel field-effect transistor (FET). The heterogate concept enables a wide range of gate materials for device study. This concept is derived from the well-known continuity of the displacement vector at the interface between low- and high-k gate dielectric materials. Application of high-k gate dielectric material improves the internal electric field in the device, resulting in lower tunneling width with high ION and low IOFF current. The impact of work function variations and doping on device performance is also comprehensively investigated.

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